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Senior Project Spring 2020


Project Background

When an analog video signal is interpreted by a high definition television, there is an extra amount of processing time called "lag time" in the video feed. Lag time is bad for people who play retro video games on the origional consoles.

The still image comparison of the same video signal being displayed on a cathode ray tube monitor versus an HDMI monitor shows the sprite in a different position on the two screens. This is due to the time it takes the HDTV to scale the analog video.

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A video comparison shows the rubber band effect of one sprite leading the other.

Existing Solutions

What's already available

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The Framemeister is another video scaling option that starts at $799 and offers zero lag time conversion.

The RetroTink scales video. It starts as $89 and has 53 ms of lag time.

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User Needs

1

Compatability with televisions

The video converter needs to be compatible with HD televisions. This means adhering to a minimum standard of HDMI version 1.0 video output.

2

Compatability with gaming consoles

The video converter needs to have analog inputs in the RGBS 4-wire format.

3

Video Resolution

The sampling rate of the video converter needs to be fast enough not to lose any information.

My Design

Project Block Diagram The system level block diagram shows how the data will flow from the input to the output. The color information will get sampled by the ADC, processed by the FPGA, and encoded by the HDMI driver. The SRAM is for pixel information storage and the microcontroler is for startup configuration.

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Verilog Top Level Block Diagram The hardware description language block diagram describes the top level of the video processing system. 

Explanation of Blocks

Clock_wiz_0 generates the 74.25MHz and 24.75MHz clock frequencies for the system from the 100MHz onboard clock. It is a pre-written IP from Xilinx.

Frame_Sync finds the first pixel of the video frame based on the HSYNC and VSYNC signals from the ADC. It sends a strobe to the Frame_Timer to reset the frame counters.

Frame_Timer generates the video timing. The frame counters get reset by Frame_Sync. It sends out the video position for both the incoming and outgoing data. The color that it gets back for the corresponding position is sent out to the HDMI driver, along with the synchronization signals.

Read_Write maps a frame position to a location in SRAM.

It either:

Receives a position and a read request, then presents a color to Frame_Timer

or

Receives a position, color, and write request, and stores the color in SRAM


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State Machines Describe the behavior of the hardware in the Verilog design.

Technical Details

Modified User and Technical Requirements

 

Requirement Number: 1

Requirement: The output of the video converter shall be compatible with HD television sets. Rationale: The purpose of the video converter is to make legacy gaming consoles able to be played on modern displays.

 

System Requirement Number: 1.1

Requirement: The video converter shall adhere to a minimum standard of HDMI version 1.0 video output. Rationale: The video converter needs to be able to be played on the widest range of consumer televisions as possible to make the product as accessible as possible to a wide range of users.

Verification Plan: Plug the video converter into an HD television and make sure it displays video.

 

System Requirement Number: 1.2

Requirement: The video converter shall use an HDMI A standard 19 pin connector. Rationale: The HDMI A 19 pin connector is a common type of HDMI adapter plug.

Verification Plan: Use an HDMI A cable with the video converter and make sure it displays video.

 

User Requirement Number: 2

Requirement: The output of the video converter shall be compatible with a variety of 16-bit gaming consoles. Rationale: The speed of this video converter makes it ideal for retro video game console signal conversion.

 

System Requirement Number: 2.1

Requirement: The video converter shall have RGBS analog component inputs for Red, Green, Blue, and Composite Sync signals. Rationale: The RGBS type of analog signal does not require any additional decoding before sampling. Each color can be sampled directly.

Verification Plan: Input an RGBS video signal and look at the output of the ADC on the oscilloscope to verify they are being sampled.

 

User Requirement Number: 3

Requirement: The video converter shall retain the full intended resolution of the original video signal. Rationale: Users want to have the best quality video possible.

 

System Requirement Number: 3.1

Requirement: The video converter shall sample at a sufficient rate to capture the incoming video signal before processing. Rationale: If the ADC samples too slowly, information will be lost and image resolution will be poor.

Verification Plan: Calculate how many samples per frame of video the ADC requires to sample each incoming pixel, then look at the output of the ADC on the oscilloscope to make sure it is sampling at that frequency.

 

 

User Requirement Number: 4

Requirement: The video converter shall display the image as large as possible on the screen without changing the aspect ratio of the original image. Rationale: Using the largest portion of the HD display will avoid wasting screen viewing area. Users want an accurate representation of the original video without it being stretched.

 

System Requirement Number: 4.1

Requirement: The video converter shall scale the incoming image to be displayed on the screen by an integer multiple of the original image size without exceeding the boundaries of the screen. Rationale: It will require less digital logic to scale each incoming pixel by in integer multiple.

Verification Plan: Generate a test input pixel to the scaler and look at the digital waveforms to ensure that an integer multiple of neighboring horizontal and vertical pixel values match.

 

User Requirement Number: 5

Requirement: The user shall be unaware of any additional latency introduced in the video signal. Rationale: Video games that the video converter will display require short reaction times to play.

 

System Requirement Number: 5.1

Requirement: Each image frame input to the video converter shall take no longer than 100ms to reach the input to the display. Rationale: 100ms is an acceptable amount of latency for user reaction time when gaming.

Verification Plan: Generate a test input pixel to the video converter. Set an oscilloscope to trigger on the edge of the test input pixel and verify the time for the output signal to respond.

 

User Requirement Number: 6

Requirement: The video converter shall be small enough to fit on an entertainment center shelf. Rationale: The video converter would not be practical to use if it was too large.

 

System Requirement Number: 6.1

Requirement: The video converter shall have a footprint no larger than 30cm by 30cm and a height no larger than 12cm. Rationale: This size is roughly the size of other products that fit on entertainment center shelves, such as retro gaming consoles.

Verification Plan: Measure the video converter with a ruler to ensure it is smaller than these dimensions.

 

User Requirement Number: 7

Requirement: The video converter shall be light enough to ship and to carry. Rationale: Keeping the weight down makes the product more portable and more accessible for people to purchase and have shipped.

 

System Requirement Number: 7.1

Requirement: The video converter shall weigh less than 2kg. Rationale: Weighing more than 2kg would make it difficult to move the video converter.

Verification Plan: Place the video converter on a scale and verify the weight.


User Requirement Number: 8

Requirement: The video converter shall be powered by a single DC wall adapter. Rationale: Keeping the number of power cables to a minimum makes it more convenient for the user.

 

System Requirement Number: 8.1

Requirement: The video converter shall consume less than 16W of power. Rationale: Consuming more than 16W of power would make it difficult to power the video converter by means of a simple DC wall adapter.

Verification Plan: Use a voltage meter and current meter on the output of the power supply to test the power consumption.

 

User Requirement Number: 9

Requirement: The video converter shall cost less than a similar product currently available. Rationale: Users would not be compelled to purchase the video converter if the cost was higher than a similar product.

 

System Requirement Number: 9.1

Requirement: The video converter shall cost less than $500. Rationale: A similar product already available costs around $500.

Verification Plan: Add the cost of the components to see if the sum is less than $500.


Schematics Documents

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Board Layout

3D Render
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Composite Layers

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Top Layer

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Layer 2

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Layer 3

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Bottom Layer

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Prototype Images

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HDMI Driver

A prototype PCB that breaks out the pins from the HDMI driver chip to be used with a breadboard

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ADC

A prototype PCB that breaks out the pins of the analog to digital converter for use with a breadboard, as well as adding decoupling capacitors to the analog inputs

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FPGA

The FPGA development board that was chosen was the Alchitry AU Xilinx board because of the high number of input/output pins

Verilog Video Timing Test Code

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Altium Simulation Waveforms

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